|학술대회||2014년 가을 (11/27 ~ 11/28, 대전컨벤션센터)|
|발표분야||A. 전자/반도체 재료(Electronic and Semiconductor Materials)|
|제목||Electrical Characterization of Atomic Layer Deposited La2O3 Capped HKMG Devices|
|초록||In this study, we have studied atomic layer deposition (ALD) La2O3 capping on the high-k gate dielectrics to tune work-function, which is compatible with gate-first (GF) nMOS device. Two different La precursors - (1) La(fAMD)3 and (2) La(thd)3 - were chosen for ALD capping layer. It is shown that both precursors induce more VFB shift as increasing capping thickness, but more shift is observed with La(fAMD)3. At 1.5 nm thickness, La(fAMD)3 causes about 200 mV while La(thd)3 130mV. VFB shift behaviors on Si-containing HfO2 gate dielectric (i.e., HfSiOx and HfSiON) are similar to HfO2 only case. EOT is scaled down to 1.15 nm and 1.25 nm for (1) and (2) precursors, respectively. Interface state density (Dit) increases with increasing ALD capping regardless of precursor types. However, La(fAMD)3 shows lower Dit than La(thd)3. Charge trapping characteristics are compared by time-dependent VFB shift during stress. It is demonstrated that improved charge trapping behavior is shown with La(fAMD)3for either 1.1V or 1.6V as for stress voltage. These electrical improvement with La(fAMD)3 aforementioned are attributed to different ALD process and lower carbon in the precursor matrix compared with La(thd)3. We investigated VFB shiftt, EOT scaling and charge trapping on ALD La capped HKMG device. Our result suggests that beside process optimization, precursor is also important to attain improved electrical properties of GF-based nMOS device applications.
This research was supported by the IT R&D program of MKE/KEIT (10039174, Technology Development of 22 nm level Foundry Device and PDK)
|저자||임동환, 정우석, 최창환|
|키워드||High-K; Gate First; MOS|