|학술대회||2012년 가을 (11/07 ~ 11/09, 라카이샌드파인 리조트)|
|발표분야||F. 광기능/디스플레이 재료(Optical Funtional and Display Materials)|
|제목||Improvement in the bias stability of a-IGZO thin-film transistors using a Si3N4 gate insulator with a SiO2 nano interlayer|
|초록||Recently, amorphous oxide semiconductors (AOSs) based thin film transistors (TFTs) have attracted considerable attention as an alternative to Si-based TFTs in liquid crystal display (LCD) or organic light-emitting diode (OLED) applications. Since the report by Nomura et al., among the various AOSs, amorphous In-Ga-Zn-O (a-IGZO) has shown potential as a display (flexible and transparent displays) due to its high mobility, good uniformity attributed to its amorphous structure, and low processing temperature.
In this study, the performance of amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) with SiO2 interlayers on Si3N4 insulators was studied. A 10-nm SiO2 interlayer on a Si3N4 gate insulator dramatically improved device performance. An a-IGZO TFT with this interlayer had reduced trap density between the Si3N4 and a-IGZO channel, remarkably improving bias stability. These devices perform well and exhibit a high field-effect mobility (19.4 cm2/Vs), on/off current ratio (108), and subthreshold swing (0.33 V/decade). Also, the turn-on voltage shifted from -8 V to -5 V with negligible changes in the subthreshold swing and field effect mobility after total stress time.
|저자||한동석, 박재형, 강유진, 윤돈규, 이상호, 박종완|
|키워드||amorphous oxide semiconductor; thin film transistor; amorphous In-Ga-Zn-O (a-IGZO); plasma treated gate insulator; bias stability|