화학공학소재연구정보센터
Applied Surface Science, Vol.184, No.1-4, 317-322, 2001
A modified oxidation procedure for ion-implanted silicon carbide devices annealed at low temperatures
There is recent evidence that the temperature at which implants in SiC are activated plays a determining role in the performance of some devices. One example is the dependence of the channel mobility of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) on the annealing temperature needed to activate source and drain implants. Another example is the dependence of surface roughness on anneal temperature. In both cases, there are definite advantages in using low processing temperatures for implant activation anneals. This paper considers low-temperature ion implantation processing of SiC electronic materials, and modifications to the gate oxidation step for SiC MOSFETs that may be required by the use of low-temperature activation annealing. The term 'low-temperature' is used to indicate annealing temperatures well below 1500 degreesC which are typically used for donor implant activation in SiC. The substitution of phosphorus for nitrogen in the fabrication of MOSFETs, while enabling low-temperature activation annealing, leads to excessive gate leakage currents. The cause of oxide leakage is discussed speculatively in terms of excess carbon on the SiC prior to gate oxidation. These assumptions form the premise for SiC MOSFET experiments fabricated with phosphorus-implanted source and drain regions, and a modified oxidation procedure. MOSFETs built using phosphorus implants annealed at 1200 degreesC and the modified oxidation procedure exhibit I-D/I-G current ratios greater than 10(4), and channel mobilities in excess of 10 cm(2)/Vs. The device yield is greater than 90%.